The present disclosure herein relates to a semiconductor device and a method of fabricating the same, and more particularly, to a three dimensional semiconductor memory device and a method of fabricating the same. Three-dimensional (3D) memory technologies are technologies for increasing a memory capacity, and also represent technologies related to three-dimensionally arranged memory cells. The memory capacity may be increased through (1) fine pattern technologies and (2) multi level cell (MLC) technologies. However, the fine pattern technologies may be accompanied with high cost, and the MLC technologies may be limited by the number of increasable bits per cell. For this reason, it seems that 3D technologies are a necessary way of increasing memory capacity. In addition, when the fine pattern technologies and the MLC technologies are combined with the 3D memory technologies, the memory capacity can be further increased. Thus, it is expected that the fine pattern technologies and the MLC technologies are developed as technologies independent of the 3D memory technologies.
Recently, a punch-and-plug technology was proposed as one of the 3D memory technologies. The punch-and-plug technology includes sequentially forming multi-layered thin films on a substrate and forming plugs passing through the multi-layered thin films. When the punch-and-plug technology is applied, the memory capacity of 3D memory devices may be largely increased without significantly increasing fabrication costs. Therefore, the punch-and-plug technology is in the spotlight in recent years.